Currently, there are some useless includes in the codebase. We can use a tool named include-what-you-use to optimize these includes. By using a strict include-what-you-use policy, we can get lots of benefits from it.
226 lines
8.2 KiB
C++
226 lines
8.2 KiB
C++
// Licensed to the Apache Software Foundation (ASF) under one
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// or more contributor license agreements. See the NOTICE file
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// distributed with this work for additional information
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// regarding copyright ownership. The ASF licenses this file
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// to you under the Apache License, Version 2.0 (the
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// "License"); you may not use this file except in compliance
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// with the License. You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing,
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// software distributed under the License is distributed on an
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// "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
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// KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations
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// under the License.
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// This file is copied from
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// https://github.com/apache/impala/blob/branch-2.9.0/be/src/util/cpu-info.h
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// and modified by Doris
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#pragma once
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#include <glog/logging.h>
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#include <stdint.h>
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#include <memory>
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#include <string>
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#include <vector>
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namespace doris {
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/// CpuInfo is an interface to query for cpu information at runtime. The caller can
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/// ask for the sizes of the caches and what hardware features are supported.
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/// On Linux, this information is pulled from a couple of sys files (/proc/cpuinfo and
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/// /sys/devices)
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class CpuInfo {
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public:
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static const int64_t SSSE3 = (1 << 1);
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static const int64_t SSE4_1 = (1 << 2);
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static const int64_t SSE4_2 = (1 << 3);
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static const int64_t POPCNT = (1 << 4);
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static const int64_t AVX = (1 << 5);
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static const int64_t AVX2 = (1 << 6);
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/// Cache enums for L1 (data), L2 and L3
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enum CacheLevel {
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L1_CACHE = 0,
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L2_CACHE = 1,
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L3_CACHE = 2,
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};
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static const int NUM_CACHE_LEVELS = L3_CACHE + 1;
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/// Initialize CpuInfo.
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static void init();
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/// Determine if the CPU meets the minimum CPU requirements and if not, log an error.
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static void verify_cpu_requirements();
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/// Determine if the CPU scaling governor is set to 'performance' and if not, issue an
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/// error.
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static void verify_performance_governor();
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/// Determine if CPU turbo is disabled and if not, issue an error.
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static void verify_turbo_disabled();
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/// Returns all the flags for this cpu
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static int64_t hardware_flags() {
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DCHECK(initialized_);
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return hardware_flags_;
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}
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/// Returns whether of not the cpu supports this flag
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inline static bool is_supported(long flag) {
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DCHECK(initialized_);
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return (hardware_flags_ & flag) != 0;
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}
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/// Toggle a hardware feature on and off. It is not valid to turn on a feature
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/// that the underlying hardware cannot support. This is useful for testing.
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static void enable_feature(long flag, bool enable);
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/// Returns the number of cpu cycles per millisecond
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static int64_t cycles_per_ms() {
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DCHECK(initialized_);
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return cycles_per_ms_;
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}
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/// Returns the number of cores (including hyper-threaded) on this machine that are
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/// available for use by Impala (either the number of online cores or the value of
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/// the --num_cores command-line flag).
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static int num_cores() {
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DCHECK(initialized_);
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return num_cores_;
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}
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/// Returns the maximum number of cores that will be online in the system, including
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/// any offline cores or cores that could be added via hot-plugging.
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static int get_max_num_cores() { return max_num_cores_; }
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/// Returns the core that the current thread is running on. Always in range
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/// [0, GetMaxNumCores()). Note that the thread may be migrated to a different core
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/// at any time by the scheduler, so the caller should not assume the answer will
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/// remain stable.
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static int get_current_core();
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/// Returns the maximum number of NUMA nodes that will be online in the system,
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/// including any that may be offline or disabled.
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static int get_max_num_numa_nodes() { return max_num_numa_nodes_; }
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/// Returns the NUMA node of the core provided. 'core' must be in the range
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/// [0, GetMaxNumCores()).
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static int get_numa_node_of_core(int core) {
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DCHECK_LE(0, core);
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DCHECK_LT(core, max_num_cores_);
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return core_to_numa_node_[core];
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}
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/// Returns the cores in a NUMA node. 'node' must be in the range
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/// [0, GetMaxNumNumaNodes()).
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static const std::vector<int>& get_cores_of_numa_node(int node) {
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DCHECK_LE(0, node);
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DCHECK_LT(node, max_num_numa_nodes_);
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return numa_node_to_cores_[node];
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}
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/// Returns the cores in the same NUMA node as 'core'. 'core' must be in the range
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/// [0, GetMaxNumCores()).
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static const std::vector<int>& get_cores_of_same_numa_node(int core) {
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DCHECK_LE(0, core);
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DCHECK_LT(core, max_num_cores_);
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return get_cores_of_numa_node(get_numa_node_of_core(core));
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}
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/// Returns the index of the given core within the vector returned by
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/// GetCoresOfNumaNode() and GetCoresOfSameNumaNode(). 'core' must be in the range
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/// [0, GetMaxNumCores()).
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static int get_numa_node_core_idx(int core) {
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DCHECK_LE(0, core);
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DCHECK_LT(core, max_num_cores_);
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return numa_node_core_idx_[core];
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}
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/// Returns the model name of the cpu (e.g. Intel i7-2600)
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static std::string model_name() {
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DCHECK(initialized_);
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return model_name_;
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}
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static std::string debug_string();
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/// A utility class for temporarily disabling CPU features. Usage:
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///
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/// {
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/// CpuInfo::TempDisable disabler(CpuInfo::AVX2);
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/// // On the previous line, the constructor disables AVX2 instructions. On the next
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/// // line, CpuInfo::IsSupported(CpuInfo::AVX2) will return false.
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/// SomeOperation();
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/// // On the next line, the block closes, 'disabler's destructor runs, and AVX2
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/// // instructions are re-enabled.
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/// }
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///
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/// TempDisable's destructor never re-enables features that were not enabled when then
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/// constructor ran.
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struct TempDisable {
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TempDisable(int64_t feature)
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: feature_(feature), reenable_(CpuInfo::is_supported(feature)) {
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CpuInfo::enable_feature(feature_, false);
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}
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~TempDisable() {
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if (reenable_) {
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CpuInfo::enable_feature(feature_, true);
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}
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}
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private:
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int64_t feature_;
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bool reenable_;
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};
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protected:
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friend class CpuTestUtil;
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/// Setup fake NUMA info to simulate NUMA for backend tests. Sets up CpuInfo to
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/// simulate 'max_num_numa_nodes' with 'core_to_numa_node' specifying the NUMA node
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/// of each core in [0, GetMaxNumCores()).
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static void _init_fake_numa_for_test(int max_num_numa_nodes,
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const std::vector<int>& core_to_numa_node);
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private:
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/// Initialize NUMA-related state - called from Init();
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static void _init_numa();
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/// Initialize 'numa_node_to_cores_' based on 'max_num_numa_nodes_' and
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/// 'core_to_numa_node_'. Called from InitNuma();
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static void _init_numa_node_to_cores();
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/// Populates the arguments with information about this machine's caches.
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/// The values returned are not reliable in some environments, e.g. RHEL5 on EC2, so
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/// so we will keep this as a private method.
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static void _get_cache_info(long cache_sizes[NUM_CACHE_LEVELS],
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long cache_line_sizes[NUM_CACHE_LEVELS]);
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static bool initialized_;
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static int64_t hardware_flags_;
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static int64_t original_hardware_flags_;
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static int64_t cycles_per_ms_;
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static int num_cores_;
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static int max_num_cores_;
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static std::string model_name_;
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/// Maximum possible number of NUMA nodes.
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static int max_num_numa_nodes_;
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/// Array with 'max_num_cores_' entries, each of which is the NUMA node of that core.
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static std::unique_ptr<int[]> core_to_numa_node_;
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/// Vector with 'max_num_numa_nodes_' entries, each of which is a vector of the cores
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/// belonging to that NUMA node.
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static std::vector<std::vector<int>> numa_node_to_cores_;
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/// Array with 'max_num_cores_' entries, each of which is the index of that core in its
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/// NUMA node.
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static std::vector<int> numa_node_core_idx_;
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};
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} // namespace doris
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