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use isal for crc check

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Co-authored-by: hnwyllmm <hnwyllmm@126.com>
This commit is contained in:
XiTang
2022-07-22 10:46:37 +08:00
committed by wangyunlai.wyl
parent c2c53f977c
commit c95b6b534e
2 changed files with 31 additions and 7 deletions
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37
deps/oblib/src/lib/checksum/ob_crc64.cpp vendored
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@ -13,6 +13,8 @@
#include <stdlib.h> #include <stdlib.h>
#include "lib/checksum/ob_crc64.h" #include "lib/checksum/ob_crc64.h"
#include "lib/ob_define.h" #include "lib/ob_define.h"
#include "isa-l/crc64.h"
#include "isa-l/crc.h"
namespace oceanbase { namespace oceanbase {
namespace common { namespace common {
@ -278,6 +280,7 @@ static const uint64_t s_crc64_table[] =
* @returns Intermediate CRC64 value. * @returns Intermediate CRC64 value.
* @param uCRC64 Current CRC64 intermediate value. * @param uCRC64 Current CRC64 intermediate value.
* @param pv The data block to process. * @param pv The data block to process.
* @param cb The size of the data block in bytes. * @param cb The size of the data block in bytes.
*/ */
uint64_t ob_crc64_optimized(uint64_t uCRC64, const void* pv, int64_t cb) uint64_t ob_crc64_optimized(uint64_t uCRC64, const void* pv, int64_t cb)
@ -2829,6 +2832,12 @@ uint64_t fast_crc64_sse42_manually(uint64_t crc, const char* buf, int64_t len)
return crc; return crc;
} }
//If the CPU is intel, ISA-L library for CRC can be used
inline static uint64_t ob_crc64_isal(uint64_t uCRC64, const char* buf, int64_t cb)
{
return crc32_iscsi((unsigned char*)(buf), cb, uCRC64);
}
uint64_t crc64_sse42_dispatch(uint64_t crc, const char* buf, int64_t len) uint64_t crc64_sse42_dispatch(uint64_t crc, const char* buf, int64_t len)
{ {
#if defined(__x86_64__) #if defined(__x86_64__)
@ -2836,14 +2845,28 @@ uint64_t crc64_sse42_dispatch(uint64_t crc, const char* buf, int64_t len)
uint32_t b = 0; uint32_t b = 0;
uint32_t c = 0; uint32_t c = 0;
uint32_t d = 0; uint32_t d = 0;
asm("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1)); uint32_t vendor_info[4];
if ((c & (1 << 20)) != 0) { __asm__("mov $0x0, %eax\n\t");
ob_crc64_sse42_func = &crc64_sse42; __asm__("cpuid\n\t");
_OB_LOG(INFO, "Use CPU crc32 instructs for crc64 calculate"); __asm__("mov %%ebx, %0\n\t":"=r" (vendor_info[0]));
} else { __asm__("mov %%edx, %0\n\t":"=r" (vendor_info[1]));
ob_crc64_sse42_func = &fast_crc64_sse42_manually; __asm__("mov %%ecx, %0\n\t":"=r" (vendor_info[2]));
_OB_LOG(INFO, "Use manual crc32 table lookup for crc64 calculate"); vendor_info[3]='\0';
if (strcmp((char*)vendor_info, "GenuineIntel") == 0) {
ob_crc64_sse42_func = &ob_crc64_isal;
_OB_LOG(INFO, "Use ISAL for crc64 calculate");
} else{
asm("cpuid" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(1));
if ((c & (1 << 20)) != 0) {
ob_crc64_sse42_func = &crc64_sse42;
_OB_LOG(INFO, "Use CPU crc32 instructs for crc64 calculate");
} else {
ob_crc64_sse42_func = &fast_crc64_sse42_manually;
_OB_LOG(INFO, "Use manual crc32 table lookup for crc64 calculate");
}
} }
#elif defined(__aarch64__) #elif defined(__aarch64__)
#if 1 #if 1
ob_crc64_sse42_func = &crc64_sse42; ob_crc64_sse42_func = &crc64_sse42;

1
deps/oblib/src/lib/checksum/ob_crc64.h vendored
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@ -66,6 +66,7 @@ inline uint64_t ob_crc64_sse42(const void* pv, int64_t cb)
return (*ob_crc64_sse42_func)(0, static_cast<const char*>(pv), cb); return (*ob_crc64_sse42_func)(0, static_cast<const char*>(pv), cb);
} }
uint64_t ob_crc64_isal(uint64_t uCRC64, const void* pv, int64_t cb);
uint64_t crc64_sse42_manually(uint64_t crc, const char* buf, int64_t len); uint64_t crc64_sse42_manually(uint64_t crc, const char* buf, int64_t len);
uint64_t fast_crc64_sse42_manually(uint64_t crc, const char* buf, int64_t len); uint64_t fast_crc64_sse42_manually(uint64_t crc, const char* buf, int64_t len);