forked from amazingfate/loongoffice
1582d9a2c5
Change-Id: I0f66d02e67388cc4d21c5e96bf84b6848e8de63a Reviewed-on: https://gerrit.libreoffice.org/c/core/+/105721 Tested-by: Jenkins Reviewed-by: Christian Lohmaier <lohmaier+LibreOffice@googlemail.com>
136 lines
3.9 KiB
C++
136 lines
3.9 KiB
C++
/* -*- Mode: C++; tab-width: 4; indent-tabs-mode: nil; c-basic-offset: 4 -*- */
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/*
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* This file is part of the LibreOffice project.
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*
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/.
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*
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*/
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#include <tools/cpuid.hxx>
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#include <cstdint>
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namespace cpuid
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{
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namespace
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{
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#if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
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#include <intrin.h>
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void getCpuId(uint32_t array[4], uint32_t nInfoType)
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{
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__cpuid(reinterpret_cast<int*>(array), nInfoType);
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}
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#elif (defined(__i386__) || defined(__x86_64__))
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#include <cpuid.h>
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void getCpuId(uint32_t array[4], uint32_t nInfoType)
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{
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__cpuid_count(nInfoType, 0, *(array + 0), *(array + 1), *(array + 2), *(array + 3));
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}
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#else
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void getCpuId(uint32_t array[4], uint32_t /*nInfoType*/)
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{
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array[0] = array[1] = array[2] = array[3] = 0;
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}
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#endif
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// For AVX we need to check if OS has support for ymm registers
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bool checkAVXSupportInOS()
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{
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uint32_t xcr0 = 0;
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#if defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_AMD64))
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xcr0 = uint32_t(_xgetbv(0));
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#elif (defined(__i386__) || defined(__x86_64__))
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__asm__("xgetbv" : "=a"(xcr0) : "c"(0) : "%edx");
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#endif
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return ((xcr0 & 6) == 6); /* checking if xmm and ymm state are enabled in XCR0 */
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}
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} // end anonymous namespace
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#define HYPER_bit (1 << 28)
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#define SSE2_bit (1 << 26)
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#define SSSE3_bit (1 << 9)
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#define SSE41_bit (1 << 19)
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#define SSE42_bit (1 << 20)
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#define XSAVE_bit (1 << 27)
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#define AVX_bit (1 << 28)
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#define AVX2_bit (1 << 5)
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InstructionSetFlags getCpuInstructionSetFlags()
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{
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InstructionSetFlags eInstructions = InstructionSetFlags::NONE;
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uint32_t info[] = { 0, 0, 0, 0 };
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getCpuId(info, 0);
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int nLevel = info[0];
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if (nLevel >= 1)
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{
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uint32_t aCpuInfoArray[] = { 0, 0, 0, 0 };
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getCpuId(aCpuInfoArray, 1);
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if ((aCpuInfoArray[3] & HYPER_bit) != 0)
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eInstructions |= InstructionSetFlags::HYPER;
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if ((aCpuInfoArray[3] & SSE2_bit) != 0)
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eInstructions |= InstructionSetFlags::SSE2;
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if ((aCpuInfoArray[2] & SSSE3_bit) != 0)
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eInstructions |= InstructionSetFlags::SSSE3;
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if ((aCpuInfoArray[2] & SSE41_bit) != 0)
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eInstructions |= InstructionSetFlags::SSE41;
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if ((aCpuInfoArray[2] & SSE42_bit) != 0)
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eInstructions |= InstructionSetFlags::SSE42;
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if (((aCpuInfoArray[2] & AVX_bit) != 0) && ((aCpuInfoArray[2] & XSAVE_bit) != 0))
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{
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if (checkAVXSupportInOS())
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{
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eInstructions |= InstructionSetFlags::AVX;
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if (nLevel >= 7)
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{
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uint32_t aExtendedInfo[] = { 0, 0, 0, 0 };
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getCpuId(aExtendedInfo, 7);
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if ((aExtendedInfo[1] & AVX2_bit) != 0)
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eInstructions |= InstructionSetFlags::AVX2;
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}
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}
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}
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}
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return eInstructions;
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}
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bool isCpuInstructionSetSupported(InstructionSetFlags eInstructions)
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{
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static InstructionSetFlags eCPUFlags = getCpuInstructionSetFlags();
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return (eCPUFlags & eInstructions) == eInstructions;
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}
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OUString instructionSetSupportedString()
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{
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OUString aString;
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if (isCpuInstructionSetSupported(InstructionSetFlags::SSE2))
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aString += "SSE2 ";
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if (isCpuInstructionSetSupported(InstructionSetFlags::SSSE3))
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aString += "SSSE3 ";
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if (isCpuInstructionSetSupported(InstructionSetFlags::SSE41))
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aString += "SSE4.1 ";
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if (isCpuInstructionSetSupported(InstructionSetFlags::SSE42))
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aString += "SSE4.2 ";
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if (isCpuInstructionSetSupported(InstructionSetFlags::AVX))
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aString += "AVX ";
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if (isCpuInstructionSetSupported(InstructionSetFlags::AVX2))
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aString += "AVX2 ";
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return aString;
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}
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} // end cpuid
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/* vim:set shiftwidth=4 softtabstop=4 expandtab: */
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