AEC3: Fix delay hysteresis validation

The configuration validation checked the wrong hysteresis limit.

Bug: webrtc:8671
Change-Id: Icd49ae612925e306aa4db01afce2d43b75792b9c
Reviewed-on: https://webrtc-review.googlesource.com/c/122461
Commit-Queue: Gustaf Ullberg <gustaf@webrtc.org>
Reviewed-by: Per Åhgren <peah@webrtc.org>
Cr-Commit-Position: refs/heads/master@{#26647}
This commit is contained in:
Gustaf Ullberg
2019-02-12 12:23:02 +01:00
committed by Commit Bot
parent 99b9149cee
commit 9bf67eae29
2 changed files with 3 additions and 2 deletions

View File

@ -88,8 +88,8 @@ bool EchoCanceller3Config::Validate(EchoCanceller3Config* config) {
res = false; res = false;
} }
if (c->delay.delay_headroom_blocks <= 1 && if (c->delay.delay_headroom_blocks <= 1 &&
c->delay.hysteresis_limit_1_blocks == 1) { c->delay.hysteresis_limit_2_blocks == 1) {
c->delay.hysteresis_limit_1_blocks = 0; c->delay.hysteresis_limit_2_blocks = 0;
res = false; res = false;
} }
res = res & Limit(&c->delay.default_delay, 0, 5000); res = res & Limit(&c->delay.default_delay, 0, 5000);

View File

@ -139,6 +139,7 @@ TEST(SignalDependentErleEstimator, LongerRun) {
cfg.filter.main_initial.length_blocks = 1; cfg.filter.main_initial.length_blocks = 1;
cfg.delay.delay_headroom_blocks = 0; cfg.delay.delay_headroom_blocks = 0;
cfg.delay.hysteresis_limit_1_blocks = 0; cfg.delay.hysteresis_limit_1_blocks = 0;
cfg.delay.hysteresis_limit_2_blocks = 0;
cfg.erle.num_sections = 2; cfg.erle.num_sections = 2;
EXPECT_EQ(EchoCanceller3Config::Validate(&cfg), true); EXPECT_EQ(EchoCanceller3Config::Validate(&cfg), true);
std::array<float, kFftLengthBy2Plus1> average_erle; std::array<float, kFftLengthBy2Plus1> average_erle;