The correct fix of workaround in r6261.
The CL also includes same changes to filterbanks.c in iSAC fix and aecm_core_c.c BUG=3370,3395,3439 TESTED=trybots R=fdegans@chromium.org, glaznev@webrtc.org, kwiberg@webrtc.org, tina.legrand@webrtc.org Review URL: https://webrtc-codereview.appspot.com/14609004 git-svn-id: http://webrtc.googlecode.com/svn/trunk@6337 4adac7df-926f-26a2-2b94-8c16560cd09d
This commit is contained in:
@ -105,7 +105,6 @@ int WebRtcSpl_ComplexFFT(int16_t frfi[], int stages, int mode)
|
||||
|
||||
#ifdef WEBRTC_ARCH_ARM_V7
|
||||
int32_t wri = 0;
|
||||
int32_t frfi_r = 0;
|
||||
__asm __volatile("pkhbt %0, %1, %2, lsl #16" : "=r"(wri) :
|
||||
"r"((int32_t)wr), "r"((int32_t)wi));
|
||||
#endif
|
||||
@ -115,19 +114,19 @@ int WebRtcSpl_ComplexFFT(int16_t frfi[], int stages, int mode)
|
||||
j = i + l;
|
||||
|
||||
#ifdef WEBRTC_ARCH_ARM_V7
|
||||
register int32_t frfi_r;
|
||||
__asm __volatile(
|
||||
"pkhbt %[frfi_r], %[frfi_even], %[frfi_odd], lsl #16\n\t"
|
||||
"pkhbt %[frfi_r], %[frfi_even], %[frfi_odd],"
|
||||
" lsl #16\n\t"
|
||||
"smlsd %[tr32], %[wri], %[frfi_r], %[cfftrnd]\n\t"
|
||||
:[frfi_r]"+r"(frfi_r),
|
||||
[tr32]"=r"(tr32)
|
||||
"smladx %[ti32], %[wri], %[frfi_r], %[cfftrnd]\n\t"
|
||||
:[frfi_r]"=&r"(frfi_r),
|
||||
[tr32]"=&r"(tr32),
|
||||
[ti32]"=r"(ti32)
|
||||
:[frfi_even]"r"((int32_t)frfi[2*j]),
|
||||
[frfi_odd]"r"((int32_t)frfi[2*j +1]),
|
||||
[wri]"r"(wri),
|
||||
[cfftrnd]"r"(CFFTRND)
|
||||
);
|
||||
__asm __volatile("smladx %0, %1, %2, %3\n\t" : "=r"(ti32) :
|
||||
"r"(wri), "r"(frfi_r), "r"(CFFTRND));
|
||||
|
||||
[cfftrnd]"r"(CFFTRND));
|
||||
#else
|
||||
tr32 = WEBRTC_SPL_MUL_16_16(wr, frfi[2 * j])
|
||||
- WEBRTC_SPL_MUL_16_16(wi, frfi[2 * j + 1]) + CFFTRND;
|
||||
@ -252,7 +251,6 @@ int WebRtcSpl_ComplexIFFT(int16_t frfi[], int stages, int mode)
|
||||
|
||||
#ifdef WEBRTC_ARCH_ARM_V7
|
||||
int32_t wri = 0;
|
||||
int32_t frfi_r = 0;
|
||||
__asm __volatile("pkhbt %0, %1, %2, lsl #16" : "=r"(wri) :
|
||||
"r"((int32_t)wr), "r"((int32_t)wi));
|
||||
#endif
|
||||
@ -262,12 +260,13 @@ int WebRtcSpl_ComplexIFFT(int16_t frfi[], int stages, int mode)
|
||||
j = i + l;
|
||||
|
||||
#ifdef WEBRTC_ARCH_ARM_V7
|
||||
register int32_t frfi_r;
|
||||
__asm __volatile(
|
||||
"pkhbt %[frfi_r], %[frfi_even], %[frfi_odd], lsl #16\n\t"
|
||||
"smlsd %[tr32], %[wri], %[frfi_r], %[cifftrnd]\n\t"
|
||||
"smladx %[ti32], %[wri], %[frfi_r], %[cifftrnd]\n\t"
|
||||
:[frfi_r]"+r"(frfi_r),
|
||||
[tr32]"=r"(tr32),
|
||||
:[frfi_r]"=&r"(frfi_r),
|
||||
[tr32]"=&r"(tr32),
|
||||
[ti32]"=r"(ti32)
|
||||
:[frfi_even]"r"((int32_t)frfi[2*j]),
|
||||
[frfi_odd]"r"((int32_t)frfi[2*j +1]),
|
||||
|
@ -41,7 +41,7 @@ static __inline int32_t WEBRTC_SPL_MUL_32_32_RSFT32(int16_t a,
|
||||
__asm __volatile (
|
||||
"pkhbt %[tmp], %[b], %[a], lsl #16\n\t"
|
||||
"smmulr %[tmp], %[tmp], %[c]\n\t"
|
||||
:[tmp]"+r"(tmp)
|
||||
:[tmp]"+&r"(tmp)
|
||||
:[a]"r"(a),
|
||||
[b]"r"(b),
|
||||
[c]"r"(c)
|
||||
|
@ -102,8 +102,8 @@ void WebRtcIsacfix_HighpassFilterFixDec32(int16_t *io,
|
||||
|
||||
#ifdef WEBRTC_ARCH_ARM_V7
|
||||
{
|
||||
int tmp_coeff0 = 0;
|
||||
int tmp_coeff1 = 0;
|
||||
register int tmp_coeff0;
|
||||
register int tmp_coeff1;
|
||||
__asm __volatile(
|
||||
"ldr %[tmp_coeff0], [%[coeff]]\n\t"
|
||||
"ldr %[tmp_coeff1], [%[coeff], #4]\n\t"
|
||||
@ -113,12 +113,12 @@ void WebRtcIsacfix_HighpassFilterFixDec32(int16_t *io,
|
||||
"ldr %[tmp_coeff1], [%[coeff], #12]\n\t"
|
||||
"smmulr %[a1], %[tmp_coeff0], %[state0]\n\t"
|
||||
"smmulr %[b1], %[tmp_coeff1], %[state1]\n\t"
|
||||
:[a2]"+r"(a2),
|
||||
[b2]"+r"(b2),
|
||||
[a1]"+r"(a1),
|
||||
[b1]"+r"(b1),
|
||||
[tmp_coeff0]"+r"(tmp_coeff0),
|
||||
[tmp_coeff1]"+r"(tmp_coeff1)
|
||||
:[a2]"=&r"(a2),
|
||||
[b2]"=&r"(b2),
|
||||
[a1]"=&r"(a1),
|
||||
[b1]"=r"(b1),
|
||||
[tmp_coeff0]"=&r"(tmp_coeff0),
|
||||
[tmp_coeff1]"=&r"(tmp_coeff1)
|
||||
:[coeff]"r"(coefficient),
|
||||
[state0]"r"(state0),
|
||||
[state1]"r"(state1)
|
||||
|
@ -260,7 +260,7 @@ static int TimeToFrequencyDomain(AecmCore_t* aecm,
|
||||
__asm __volatile(
|
||||
"smulbb %[tmp32no1], %[real], %[real]\n\t"
|
||||
"smlabb %[tmp32no2], %[imag], %[imag], %[tmp32no1]\n\t"
|
||||
:[tmp32no1]"+r"(tmp32no1),
|
||||
:[tmp32no1]"+&r"(tmp32no1),
|
||||
[tmp32no2]"=r"(tmp32no2)
|
||||
:[real]"r"(freq_signal[i].real),
|
||||
[imag]"r"(freq_signal[i].imag)
|
||||
|
Reference in New Issue
Block a user